MSP430单片机教程.pdf

MSP430?1?MSP430?1?MSP430?MSP430?16?1996?!?#$?%&()*+,?-./0?12345?6?789?:;MSP430?.?A?BCDE?FGH?I0J?K 1996?LE MSP430?-MN 2000?O?F?I0PQLE?33X?32X?31X RS?TU 2000?OVLEW 11X?11X1?MSP430?33X?32X?31X R?LCD XYZ?_?2a?bc?ROM?d C e?OTP?d P e?(EPROM?d E eRf?EPROM?ghij?klmnopqr?stu G?-.FvwxWFS?-.Zy?zJuBCu EPROM?-.G?|u OTP?l?|T ROM?2000?LEW 11X/11X1?F?u 20?%?(I/O?a?gh?a?F?MSP430 1?EW!?R?v?!?5t?J?%l“?fifl?I/O?R?33X?33X?gha?a?a3?u?_u”t5?2?33X?T?%?A/D V?32X?Flash?Flash?.?TI?vF?MSP430?6?2000?7 LE F13X/F14X?2001?7 N 2002?VLE F41X?F43X?F44X F?Flash?F41X?u?a?!?48?I/O?96 0 LCD XY F43X?F44X?13X?14X?W?XY?XY LCD?0?3XX?5 120 0?N 160 0?W?%?3CU?.?W?MSP430?Flash?_”?-.?u?w?Eax?F?TI?LE?Flash?JTAG?g-.?MSP-FET430X110?Q?JTAG?(Flash?A?MSP430F?C Flash?FET-.?-.)y?)*?g?uR?uW?a3?G?-.)y?&?2001?TI?V?W BOOTSTRAP?bu!B?CUtS?B?kl%?A?F3?_?fi?WV?)*?/0 BOOTSTRAP?B?N 32?I0?:?(%?l?U?3 MSP430?W?TI?2002?(2003?V?LEW F15X(F16X?F?:?6?W?)?.?K?)?RAM?F1611?RAM?NW 10KB FG?!?_d RTOS e?MSP430?#$RAM?T.%W&?K&qZ?W I 2 C?DMA?DAC12(SVS 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C lo?l?|C3W?B0?T?u?B0?d DMA eZ MSP430?F?%&3?_?9)?W?)*0123?45?MSP430?OPT?FLASH?(ROM?H?fi?Ffi?-./0?g OPT?(ROM?fi?Su?-.2?U?j?f?|FLASH?)*?-.?mn?$3fi?%?JTAG?B*?FLASH?$?uQ?A?N FLASH%?fi%?fi_JA?kl?JTAG 8?%“”?Su?)?l-.F?)yt?PC?(?JTAG?T?t?(A-.?“(C MSP430?stC FLASH?3s67%89:;45 MSP430?fi3?klmno3-40 85 fi?”?u?mn?89C 51#=?2?5?89C 51?fl?3W?MSP430?23?l?aPQ?89C 51?8?Z?45?A?C?%?B?BC?5?kDF%?3?H?kl?f?89C 51?*?5”?)yJs?)y(*)yu?*b3 24mA?*UV?*b3 3mA|zS?*)y?*BC?N 2V?3W?%?RAM 6?B?t?50uA?*bT MSP430?)?89C 51?B?u$3?MSP430?u Su*?w?6?89C 51?%?o?8?%?Z?8?m?%?Z?W?p?:6?J?Z?fi?MSP430?56?16?g?%?Bo?8?o?:6?$T!FG?-4?56?.?8?Z?16?Z?zS?Z/?j?/ZF?Zv?)*?Fv?3 MSP430?(6?fi?$U?-.?89C51?!?6?3!?fl?W?2?m)?W?23Su?-.?A?MSP430?T?W Flash?A?(JTAG?S-.?*?T?ghv?BC?A4.MSP430#=?ABCDEFMSP430?fi?CPU?A?(ROM?ROM(Flash ROM)?B?(RAM)?kl_J?&qZ(kl(?iRst?Z?:6?1?BCDE?MSP430%?W”D?fi?u?(?_J MCU)?2?16?A?6?A?”?PC?SP?UVA?SR(?.?CGl?CG2 F 4?A?u?W R3?CG2(R2?CGl&?A?B3uA?u?!?.?3?xl?T?u?B?CGl?CG2?;ZyBC?BG 2?3?w 1 6?3e?4?3&qZ?o?K?6BCDE?&qZB?3?d 16?eZ(?d 8?eZ?5?&qZ?MAB?16?MDB?8?j 16?CPU CPU?16?ALU?16?A?(?R?_J?2?CPU%?16?Bo?(16?o?|CPU klu”?Zx?|PC?SR(SP M?_J?S?u-.B?;Zy(?fiD?G 1 HIJ MSP430?u“?:6”$?RAM?ROM(?&qZ?g?%?zu?q?Zl;?&?A?&qZ?000H?1FFH?|RAM(ROM q?0200H?FFFFH?B?d RAM e?yM?0200H?CPU?Bo?(MDB)?o?(MAB)?e?G 3d 1 eA?MSP430?A?ROM?OTP(Flash ROM H?(?ROM?1KB?60KB?|Flash?f?%?2?0 128B dq 256B e?“?C 1KB?4?A?d BOOT ROM e|?o?C?y8?T?BBCu?j?)y?Bo?d MDB e(?Z?o?d MAB e|?Z?Z?“N?Y?6?64KB?16?z 0FFFFH?0FFE0H?4?(6?|?A?6BC?4wh?B?C?FwR?u|A?A?BCP8?o?CPU?z?o?MAB(?Bo?MDB d?B?BCC?j?L?2?%?128B?10KB?|?BC?j?l!?(PC?!?Ll?;?7?:;KL MSP430?_J?klst_?A?(SFR)6?“?g SFR 6?BC?6?C?89 6?UV?fiC?&qZ?Zy?&qZ?!?BC?*b?T?ZA?6?B?&qZ?ZyBCu SFR?w?x,-./&qZ?d Basic Timer e?16?(Timer_A Timer_B)?ADC?I/O?g?l?d USART eC?XYZR&qZ?MAB?MDB?CPU?d 8?eZ?Bo?8?o?*?16?CPU?FZ?B?.?&?tu?|?d 16?eZ?Bo?16?.?T?CPU?16?Bo?Z?!?P?J MSP430?d 8?eZ(?d 16?eZ?WCD?w 2(w 3 G 4 MNJOPQ?RJ kl LFXT1 d LF e?()3u?32768 Hz?k”?W?G&?Z?fi?2?%?vBCu?k?F?t&?*?F13X?F14X?F15X(F16X C F4XX?%?B?k?XT2 klW?Gkl&?F13X?F14X?F15X(F16X?_J RC kld DCO e?u!?kl?_J(iK?|F4XX?kiKu?him*?(FLL j FLL?)l?i FLL j FLL?*UC?iK-M?_J?_kl(DCO)?N?iK?.?iK?k?i?“N MCLK&qZ CPU?+,BCuC?m?Zy?klS 1 MSP430 T?HIJ?OTP ROM Flash ROM ROM(kB)RAM(?)1 X1101MSP 430C 11101 MSP 430F 11101A 1 128 2 X1111MSP 430C 1111MSP430F1111A2 128 3 X112 MSP430P112 4 256 4 X1121MSP 430F 1121A4 256 5 X1122MSP430F1122 4 256 6 X1132MSP430F1132 8 256 7 X122 MSP430F122 4 256 8 X 1222 MSP430F1222 4 256 9 X123 MSP430F123 8 256 10X1232MSP430F1232 8 256 11X133 MSP 430F 133 8 256 12X1331MSP430C1331 8 256 13X135 MSP 430F 135 16 512 14X1351MSP430C1351 16 512 15X147 MSP 430F 147 32 1 K 16X1471MSP 430F 1471 32 1 K 17X148 MSP 430F 148 48 2 K 18X1481MSP 430F 1481 48 2 K 19X149 MSP 430F 149 60 2 K 20X1491MSP 430F 1491 60 2 K 21X155 MSP 430F 155 16 512 22X156 MSP 430F 156 24 1 K 23X157 MSP 430F 157 32 1 K 24X167 MSP 430F 167 32 1 K 25X168 MSP 430F 168 48 2 K 26X169 MSP 430F 169 60 2 K 27X1610MSP 430F 1610 32 5 K 28X1611MSP 430F 1611 48 10 K 29X311 MSP 430C 311 2 128 30X 312MSP 430C 312 4 256 31X 313MSP430P313 MSP 430C 313 8 256 32X 314MSP 430C 314 12 512 33X 315MSP430P315 MSP 430C 315 16 512 34X323 MSP 430C 323 8 256 35X325 MSP430P325 MSP 430C 325 16 512 36X336 MSP 430C 336 24 1 K 37X337 MSP430P337 MSP 430C 337 32 1 K 38X412 MSP 430C 412 MSP 430F 412 4 256 39X413 MSP 430C 413 MSP 430F 413 8 256 40X423 MSP430FW423 MSP430FE423 8 256 41X425 MSP430FW425 MSP430FE425 16 512 42X427 MSP430FW427 MSP430FE427 32 1 K 43X435 MSP 430F 435 16 512 44X436 MSP 430F 436 24 1 K 45X437 MSP 430F 437 32 2 K 46X447 MSP 430F 447 32 1 K 47X448 MSP 430F 448 48 2 K 48X449 MSP 430F 449 60 2 K MSP430?2?MSP430?MSP430?UVWXMSP430?3?MSP430?MSP430?TI?1996?-ML?&?2W?5Z?KTS?u?MSP430 f?BC?25?f?2?W?G?2?MSP430?1?u m?w?!?#$%C&*(R?!?st?Jd1e?*pq?1.8?3.6Vd2e?)?5?Zy(CU#*+,-)d3e+,?SuZyd4e?kD?16?RISC 56?125ns?H?d5e#$?Z?F?Z?JAJ5.10/14?AD|BJ0?12?DA|CJ?a|DJ?XY|EJ*1|FJl USART(UART/SPIe|GJfifl?|HJD)?5?16?8?dBl?a?PWM?Ee|IJDMA _Jd6eFLASH?t2&?*?kl?A?_J?34(0?|d7eMSP430 f?JTAG?JTAG?BC)*?w?xl?A?R?|d8e+,?2)y?B JTAG(BSL?)y?CPU%?A?e?%?:6?5?6781?*+?,-?9:D?W?F82st?MSP430?;MSP430?“N?2?J?*?“NdPORe?*“NdPUCe?1?FLASH?E?AB?“N?*C?_?fiJd1ePOR“N?|d2eD)?E?D)?DE|d3e?D)?E?AB|d4e?FLASH?E?ABPOR(PUC?e?JPOR“N?#EF?_?PUC“NT PUC“N?#?y POR“N?.?POR“N?PUC“N=.?#S MSP430 K?0 xFFFE 8?6?A?K6?-Mxlfi6?W POR?=.PUC“N&?GH?8?6?I?$?y?PUC“N?C*E?w3?|d2e?I/O?w3?|d3e&qZ?OMJ?A?3e/K?L|d4eUVA?SR?|d5eD)?M,?Zy|d6eA?”?PC?0 xFFFE?K?-MxlA?100K 3?O*Pd2e?d1e?0.1uf?*?*?BCS?BQ?BCBQ?_?*URz?*MSP430?_MSP430?B?N?g5BC?Su 3?kl 23BC?Bt?kliK?BC?t?enkl?C?T?F 3?kl?3Jd1eDCO?_ RC kl!?f?%?u?BCenDCO?kliK#Hqmno(MSP430?*?ST?g?N?f?iKv?g?DCO?BC?U!?3C?3?JaJ?BCSCTL1.RSELx v?iK|bJ?DCOCTL.DCOx?iK?0V?|cJ?DCOCTL.MODx?l+?d2eLFXT1?iklN?3 32768HZ?kl?kl?t?*?vBC 450KHZ8MHZ?Gkl?t?*?d3eXT2 450KHZ8MHZ?Gkl?t?*?u?BCen?iklstu?Su*?_?iklu?fiEW?j CPU l?kDMSP430?3?“NJMCLK?_s?|SMCLK?_(?|ACLK XY?d1eMCLK?_s?W CPU kDSu?C&?&qZvBCSuMCLKBC?P?kl?“N?l 1?2?4?8?i3“Nd2eSMCLK?_(?&qZSu?Su?BCmZ?A?iSMCLK BC?P?kl?“N?l 1?2?4?8?i3“Nd3eACLK XY?&qZSu?Su?BCmZ?A?i?ACLK?LFXT1 l 1?2?4?8?i3“NPUC?U?MCLK(SMCLK?“N3 DCO?DCO?kliK3 800KHZACLK?“N3 LFXT1MSP430%?Gkl?E!*?!LFXT1d?iZye(XT2?E?“N?“NZ?50us?!*?Nkl?E?|MCLK“N?LFXT1 j XT2?MSP430?Y MCLK?“N3 DCO?FGBC?IA?kl?MSP430?iZy?LFXT1 l!5 Y!.Z5?Zy?3 LPM0LPM4(LOW POWER MODE)?CPU?,YUV3AM(ACTVE MODE)Zy6 AM?*?LPM4?*T?3 0.1uA?&?*?STJ*?v?_ PUC?U?MSP430?AM UVfi?&qZ?6?S CPU _E?Zy?=AM Zy?AM Zy?Zy?L?Zy?UVA?SR 6?SCG1?SCG0?OSCOFF?CPUOFF?_J?CPU?abfi6 CPU%?mA?(Z?m?ZyW*?CA?B?bu?W?Jt?Zy 0?B?A?6?JLPM0;?Zy 4?BC?JLMP4;?BCW_E?Zy?JLPM0_EXIT;/_E?Zy 0LPM4_EXIT;/_E?Zy 4T6?MSP430?c?E?bu6?BC?JA?(xlEKMSP430?Sdc?&qZ?6?3 MSP430?fidz&qZ?6?el?A?MSP430?fi.?Zy?fi.?6?YZ CPU?fi?eU?CPU f?UV?CPU?kD(_E?C?u6?CPU?UVMSP430?6?3 3?J?_?Bfg6?Bfg6?d1e?_?6?3 0 xFFFEd2e?Bfg6?6?30 xFFFC T?Bfg6?fi?YOFIE?NMIE?ACCVIE?fiPQI?6?6?xlu_E6?tw?OFIE?NMIE?ACCVIE?C*?fT?6?t?h?Jw?OFIE?NMIE?ACCVIE U?7?Rz_E6?A?i?#f=.6?EF6?QR?KTEF?DE?FSA?xl:|?.?jkd3eBfg6?6?6?&qZ?D)?Zy?DE?6?c?6?BC?l?6?_J?fg?vBC?m6?_J?fg5?6?WX.?T?Q?6?T?6?MSP430#?Bfg6?_J?SR.GIE?$?nT?W6?zS?Q?Bfg6?E?v?#6?u?T?6?:T?&?6?SR.GIE?ST?Bfg6?CBC?Bfg6?6?WX?PC?|d4eUVA?SR?|d5eo?5?6?WX?T?Q?6?|d6e?6?6?WX?Y?56?Rs?fi?|d7eo6?SR.GIE?SR UVA?6?CPUOFF?OSCOFF?SCG1?V?N?Z?C?|d8e?6?PC A?A?K?-Mxl 6?=?AJd1eK?6p PC?oT?6?CPU?Zy?Bfg6?p?Zy|d2eK?6p PC?oT?6?CPU?Zy?K?xlA?MSP430 m?6?wWFqerkMSP430?4?MSP430?JTAG?MSP430?_aMSP430F1?F2?F4?4?JTAG?TMS(?)?TCK(JTAG?)?TDO(?)?TDI(?)?4?JTAG?TI!#$%&()?14pin?*?+,-./?MSP430F2?01234 JATG?56?&4?789:?4?JTAG?;&4?MSP430F20 xx?*?2?AB=SBWTCK(?)?SBWTDO(?)?C7 GND?VCC 3DE?FG 4 HD?IJKL 2?MNO#TI eZSP430 USB?MNO?MSP430 JTAG?MSP430?5?MSP430?IAR WE430?1-?,?.Project/Options2-Project/Options/General Options/target/Device=MSP 430F1473-Project/Options/General Options/Debugger/Setup/Driver=FET Debugger4-Project/Options/General Options/FET Debugger/Setup/Setup/Connec on/Lpt=LPT1?LPT,?USB?J-link,?TI USB?TI USB FET?IAR WE430?!#$?%&(?)?*?5-+,?-./0?12345?6-.78?9:;?A.MSP430?6?MSP430?MSP430?-P1/2?/*DIGITAL I/O Port1/2 BC?DE FGHIJ*/#define P1IN_ 0 x0020/*P1 KLBC?*/const sfrb P1IN=P1IN_;#define P1OUT_ 0 x0021/*P1 KMBC?*/sfrb P1OUT=P1OUT_;#define P1DIR_ 0 x0022/*P1 NO?BC?*/sfrb P1DIR=P1DIR_;#define P1IFG_ 0 x0023/*P1 GH:PBC?*/sfrb P1IFG=P1IFG_;#define P1IES_ 0 x0024/*P1 GHQR?BC?*/sfrb P1IES=P1IES_;#define P1IE_ 0 x0025/*P1 GH?JBC?*/sfrb P1IE=P1IE_;#define P1SEL_ 0 x0026/*P1 IJ?BC?*/sfrb P1SEL=P1SEL_;#define P2IN_ 0 x0028/*P2 KLBC?*/const sfrb P2IN=P2IN_;#define P2OUT_ 0 x0029/*P2 KMBC?*/sfrb P2OUT=P2OUT_;#define P2DIR_ 0 x002A/*P2 NO?BC?*/sfrb P2DIR=P2DIR_;#define P2IFG_ 0 x002B/*P2 GH:PBC?*/sfrb P2IFG=P2IFG_;#define P2IES_ 0 x002C/*P2 GHQR?BC?*/sfrb P2IES=P2IES_;#define P2IE_ 0 x002D/*P2 GH?JBC?*/sfrb P2IE=P2IE_;#define P2SEL_ 0 x002E/*P2 IJ?BC?*/sfrb P2SEL=P2SEL_;MSP430?-P3/4?/*DIGITAL I/O Port3/4 BC?DE SGHIJ*/#define P3IN_ 0 x0018/*P3 KLBC?*/const sfrb P3IN=P3IN_;#define P3OUT_ 0 x0019/*P3 KMBC?*/sfrb P3OUT=P3OUT_;#define P3DIR_ 0 x001A/*P3 NO?BC?*/sfrb P3DIR=P3DIR_;#define P3SEL_ 0 x001B/*P3 IJ?BC?*/sfrb P3SEL=P3SEL_;#define P4IN_ 0 x001C/*P4 KLBC?*/const sfrb P4IN=P4IN_;#define P4OUT_ 0 x001D/*P4 KMBC?*/sfrb P4OUT=P4OUT_;#define P4DIR_ 0 x001E/*P4 NO?BC?*/sfrb P4DIR=P4DIR_;#define P4SEL_ 0 x001F/*P4 IJ?BC?*/sfrb P4SEL=P4SEL_;/*DIGITAL I/O Port5/6 I/O?BC?DE PORT5 T 6 SGHIJ*/#define P5IN_ 0 x0030/*P5 KLBC?*/const sfrb P5IN=P5IN_;#define P5OUT_ 0 x0031/*P5 KMBC?*/sfrb P5OUT=P5OUT_;#define P5DIR_ 0 x0032/*P5 NO?BC?*/sfrb P5DIR=P5DIR_;#define P5SEL_ 0 x0033/*P5 IJ?BC?*/sfrb P5SEL=P5SEL_;#define P6IN_ 0 x0034/*P6 KLBC?*/const sfrb P6IN=P6IN_;#define P6OUT_ 0 x0035/*P6 KMBC?*/sfrb P6OUT=P6OUT_;#define P6DIR_ 0 x0036/*P6 NO?BC?*/sfrb P6DIR=P6DIR_;#define P6SEL_ 0 x0037/*P6 IJ?BC?*/sfrb P6SEL=P6SEL_;MSP430?-?/*UVWX?BC?DE*/#define MPY_ 0 x0130/*SYZWX*/sfrw MPY=MPY_;#define MPYS_ 0 x0132/*FYZWX*/sfrw MPYS=MPYS_;#define MAC_ 0 x0134/*SYZW*/sfrw MAC=MAC_;#define MACS_ 0 x0136/*FYZW*/sfrw MACS=MACS_;#define OP2_ 0 x0138/*W*/sfrw OP2=OP2_;#define RESLO_ 0 x013A/*_ 6 a?BC?*/sfrw RESLO=RESLO_;#define RESHI_ 0 x013C/*b 6 a?BC?*/sfrw RESHI=RESHI_;#define SUMEXT_ 0 x013E/*a?cdBC?*/const sfrw SUMEXT=SUMEXT_;MSP430?-?/*efgD?BC?DE*/#define WDTCTL_ 0 x0120 sfrw WDTCTL=WDTCTL_;#define WDTIS0 0 x0001/*?WDTCNT h?KMijk*/#define WDTIS1 0 x0002/*?WDTCNT h?KMijk*/#define WDTSSEL 0 x0004/*?WDTCNT?lm*/#define WDTCNTCL 0 x0008/*no WDTCNT i:p 1?0=q*/#define WDTTMSEL 0 x0010/*?rs 0:efgrs;1:D?rs*/#define WDTNMI 0 x0020/*?NMI/RST tuIJ 0:p RST;1:p NMI*/#define WDTNMIES 0 x0040/*WDTNMI=1?.?vwx 0:pyx 1:p7zx*/#define WDTHOLD 0 x0080/*|efgD?0:?;1:|*/#define WDTPW 0 x5A00/*?:b?*/*SMCLK=1MHz D?rs*/#define WDT_MDLY_32 WDTPW WDTTMSEL WDTCNTCL/*TSMCLK*2POWER15=32ms?*/#define WDT_MDLY_8 WDTPW WDTTMSEL WDTCNTCL WDTIS0/*TSMCLK*2POWER13=8.192ms */#define WDT_MDLY_0_5 WDTPW WDTTMSEL WDTCNTCL WDTIS1/*TSMCLK*2POWER9=0.512ms */#define WDT_MDLY_0_064 WDTPW WDTTMSEL WDTCNTCL WDTIS1 WDTIS0/*TSMCLK*2POWER6=0.512ms */*ACLK=32.768KHz D?rs*/#define WDT_ADLY_1000 WDTPW WDTTMSEL WDTCNTCL WDTSSEL/*TACLK*2POWER15=1000ms */#define WDT_ADLY_250 WDTPW WDTTMSEL WDTCNTCL WDTSSEL WDTIS0/*TACLK*2POWER13=250ms */#define WDT_ADLY_16 WDTPW WDTTMSEL WDTCNTCL WDTSSEL WDTIS1/*TACLK*2POWER9=16ms */#define WDT_ADLY_1_9 WDTPW WDTTMSEL WDTCNTCL WDTSSEL WDTIS1 WDTIS0/*TACLK*2POWER6=1.9ms */*SMCLK=1MHz efgrs*/#define WDT_MRST_32 WDTPW WDTCNTCL/*TSMCLK*2POWER15=32ms?*/#define WDT_MRST_8 WDTPW WDTCNTCL WDTIS0/*TSMCLK*2POWER13=8.192ms */#define WDT_MRST_0_5 WDTPW WDTCNTCL WDTIS1/*TSMCLK*2POWER9=0.512ms */#define WDT_MRST_0_064 WDTPW WDTCNTCL WDTIS1 WDTIS0/*TSMCLK*2POWER6=0.512ms */*ACLK=32KHz efgrs*/#define WDT_ARST_1000 WDTPW WDTCNTCL WDTSSEL/*TACLK*2POWER15=1000ms */#define WDT_ARST_250 WDTPW WDTCNTCL WDTSSEL WDTIS0/*TACLK*2POWER13=250ms */#define WDT_ARST_16 WDTPW WDTCNTCL WDTSSEL WDTIS1/*TACLK*2POWER9=16ms */#define WDT_ARST_1_9 WDTPW WDTCNTCL WDTSSEL WDTIS1 WDTIS0/*TACLK*2POWER6=1.9ms */MSP430?-A/D?/*ADC12 A/D?BC?DE*/*ADC12?BC?*/#define ADC12CTL0_ 0 x0;/*ADC12 Control 0*/sfrw ADC12CTL0=ADC12CTL0_;#define ADC12CTL1_ 0 x01A2/*ADC12 Control 1*/sfrw ADC12CTL1=ADC12CTL1_;/*ADC12 GH?BC?*/#define ADC12IFG_ 0 x01A4/*ADC12 Interrupt Flag*/sfrw ADC12IFG=ADC12IFG_;#define ADC12IE_ 0 x01A6/*ADC12 Interrupt Enable*/sfrw ADC12IE=ADC12IE_;#define ADC12IV_ 0 x01A8/*ADC12 Interrupt Vector Word*/sfrw ADC12IV=ADC12IV_;/*ADC12 C?BC?*/#define ADC12MEM_ 0 x0140/*ADC12 Conversion Memory*/#ifndef _IAR_SYSTEMS_ICC#define ADC12MEM ADC12MEM_/*ADC12 Conversion Memory(for assembler)*/#else#define ADC12MEM(int*)ADC12MEM_)/*ADC12 Conversion Memory(for C)*/#endif#define ADC12MEM0_ ADC12MEM_/*ADC12 Conversion Memory 0*/sfrw ADC12MEM0=ADC12MEM0_;#define ADC12MEM1_ 0 x0142/*ADC12 Conversion Memory 1*/sfrw ADC12MEM1=ADC12MEM1_;#define ADC12MEM2_ 0 x0144/*ADC12 Conversion Memory 2*/sfrw ADC12MEM2=ADC12MEM2_;#define ADC12MEM3_ 0 x0146/*ADC12 Conversion Memory 3*/sfrw ADC12MEM3=ADC12MEM3_;#define ADC12MEM4_ 0 x0148/*ADC12 Conversion Memory 4*/sfrw ADC12MEM4=ADC12MEM4_;#define ADC12MEM5_ 0 x014A/*ADC12 Conversion Memory 5*/sfrw ADC12MEM5=ADC12MEM5_;#define ADC12MEM6_ 0 x014C/*ADC12 Conversion Memory 6*/sfrw ADC12MEM6=ADC12MEM6_;#define ADC12MEM7_ 0 x014E/*ADC12 Conversion Memory 7*/sfrw ADC12MEM7=ADC12MEM7_;#define ADC12MEM8_ 0 x0150/*ADC12 Conversion Memory 8*/sfrw ADC12MEM8=ADC12MEM8_;#define ADC12MEM9_ 0 x0152/*ADC12 Conversion Memory 9*/sfrw ADC12MEM9=ADC12MEM9_;#define ADC12MEM10_ 0 x0154/*ADC12 Conversion Memory 10*/sfrw ADC12MEM10=ADC12MEM10_;#define ADC12MEM11_ 0 x0156/*ADC12 Conversion Memory 11*/sfrw ADC12MEM11=ADC12MEM11_;#define ADC12MEM12_ 0 x0158/*ADC12 Conversion Memory 12*/sfrw ADC12MEM12=ADC12MEM12_;#define ADC12MEM13_ 0 x015A/*ADC12 Conversion Memory 13*/sfrw ADC12MEM13=ADC12MEM13_;#define ADC12MEM14_ 0 x015C/*ADC12 Conversion Memory 14*/sfrw ADC12MEM14=ADC12MEM14_;#define ADC12MEM15_ 0 x015E/*ADC12 Conversion Memory 15*/sfrw ADC12MEM15=ADC12MEM15_;/*ADC12 C?BC?*/#define ADC12MCTL_ 0 x0080/*ADC12 Memory Control*/#ifndef _IAR_SYSTEMS_ICC#define ADC12MCTL ADC12MCTL_/*ADC12 Memory Control(for assembler)*/#else#define ADC12MCTL(char*)ADC12MCTL_)/*ADC12 Memory Control(for C)*/#endif#define ADC12MCTL0_ ADC12MCTL_/*ADC12 Memory Control 0*/sfrb ADC12MCTL0=ADC12MCTL0_;#define ADC12MCTL1_ 0 x0081/*ADC12 Memory Contr