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IEC_TS_62215
2007
IEC/TS 62215-2Edition 1.0 2007-09TECHNICAL SPECIFICATION Integrated circuits Measurement of impulse immunity Part 2:Synchronous transient injection method IEC/TS 62215-2:2007(E)LICENSED TO MECON Limited.-RANCHI/BANGALOREFOR INTERNAL USE AT THIS LOCATION ONLY,SUPPLIED BY BOOK SUPPLY BUREAU.THIS PUBLICATION IS COPYRIGHT PROTECTED Copyright 2007 IEC,Geneva,Switzerland All rights reserved.Unless otherwise specified,no part of this publication may be reproduced or utilized in any form or by any means,electronic or mechanical,including photocopying and microfilm,without permission in writing from either IEC or IECs member National Committee in the country of the requester.If you have any questions about IEC copyright or have an enquiry about obtaining additional rights to this publication,please contact the address below or your local IEC member National Committee for further information.IEC Central Office 3,rue de Varemb CH-1211 Geneva 20 Switzerland Email:inmailiec.ch Web:www.iec.ch About the IEC The International Electrotechnical Commission(IEC)is the leading global organization that prepares and publishes International Standards for all electrical,electronic and related technologies.About IEC publications The technical content of IEC publications is kept under constant review by the IEC.Please make sure that you have the latest edition,a corrigenda or an amendment might have been published.?Catalogue of IEC publications:www.iec.ch/searchpub The IEC on-line Catalogue enables you to search by a variety of criteria(reference number,text,technical committee,).It also gives information on projects,withdrawn and replaced publications.?IEC Just Published:www.iec.ch/online_news/justpub Stay up to date on all new IEC publications.Just Published details twice a month all new publications released.Available on-line and also by email.?Electropedia:www.electropedia.org The worlds leading online dictionary of electronic and electrical terms containing more than 20 000 terms and definitions in English and French,with equivalent terms in additional languages.Also known as the International Electrotechnical Vocabulary online.?Customer Service Centre:www.iec.ch/webstore/custserv If you wish to give us your feedback on this publication or need further assistance,please visit the Customer Service Centre FAQ or contact us:Email:csciec.ch Tel.:+41 22 919 02 11 Fax:+41 22 919 03 00 LICENSED TO MECON Limited.-RANCHI/BANGALOREFOR INTERNAL USE AT THIS LOCATION ONLY,SUPPLIED BY BOOK SUPPLY BUREAU.IEC/TS 62215-2Edition 1.0 2007-09TECHNICAL SPECIFICATION Integrated circuits Measurement of impulse immunity Part 2:Synchronous transient injection method INTERNATIONAL ELECTROTECHNICAL COMMISSION UICS 31.200 PRICE CODEISBN 2-8318-9305-4LICENSED TO MECON Limited.-RANCHI/BANGALOREFOR INTERNAL USE AT THIS LOCATION ONLY,SUPPLIED BY BOOK SUPPLY BUREAU.2 TS 62215-2 IEC:2007(E)CONTENTS FOREWORD.4 INTRODUCTION.6 1 Scope.7 2 Normative references.7 3 Terms and definitions.7 4 General.8 4.1 Introduction.8 4.2 Measurement philosophy.8 4.3 Set-up concept.9 4.4 Response signal.9 4.5 Coupling networks.10 4.5.1 General.10 4.5.2 Design of coupling networks.10 4.5.3 Coupling network for the ground/Vss pin(s).10 4.5.4 Coupling network for the supply/Vdd pin(s).11 4.5.5 Coupling network for the I/O pin(s).13 4.5.6 Coupling network for the reference pins.13 4.5.7 Coupling network verification.14 4.6 Test circuit board.14 4.6.1 General.14 4.6.2 IC pin loading/termination.14 4.6.3 Power supply requirements.15 4.7 IC specific considerations.15 4.7.1 IC supply voltage.15 4.7.2 IC decoupling.15 4.7.3 Activity of IC.15 4.7.4 Guidelines for IC stimulation.15 4.7.5 IC monitoring.15 4.7.6 IC stability over time.15 5 Test conditions.16 5.1 Default test conditions.16 5.1.1 General.16 5.1.2 Ambient conditions.16 5.1.3 Ambient temperature.16 5.2 Impulse immunity of the test set-up.16 6 Test set-up.16 6.1 General.16 6.2 Test equipment.17 6.3 Set-up explanation.17 6.4 Explanation of signal relations.18 6.5 Calculation of time step and number of measurements to be conducted.18 6.6 Test procedure.19 6.7 Monitoring check.19 6.8 System verification.19 LICENSED TO MECON Limited.-RANCHI/BANGALOREFOR INTERNAL USE AT THIS LOCATION ONLY,SUPPLIED BY BOOK SUPPLY BUREAU.TS 62215-2 IEC:2007(E)3 7 Test report.20 7.1 General.20 7.2 Immunity limits or levels.20 7.3 Performance classes.20 7.4 Interpretation and comparison of results.20 Annex A(informative)Flow chart of the software used in a microcontroller.21 Annex B(informative)Flow chart for the set-up control S/W(bus control program).22 Annex C(informative)Test board requirements.23 Bibliography.27 Figure 1 Synchronous transient injection immunity methodology waveforms.9 Figure 2 Test set-up diagram for synchronous transient injection immunity testing.10 Figure 3 Circuit diagram of the coupling network for ground/Vss pin(s)of an IC.11 Figure 4 Method to impose synchronous transient injection into ground/Vss pin(s).11 Figure 5 Circuit diagr