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IEC_61523-2-2002.pdf
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IEC_61523 2002
INTERNATIONALSTANDARDIEC61523-2First edition2002-05Delay and power calculation standards Part 2:Pre-layout delay calculation specificationfor CMOS ASIC librariesReference numberIEC 61523-2:2002(E)LICENSED TO MECON Limited.-RANCHI/BANGALOREFOR INTERNAL USE AT THIS LOCATION ONLY,SUPPLIED BY BOOK SUPPLY BUREAU.Publication numberingAs from 1 January 1997 all IEC publications are issued with a designation in the60000 series.For example,IEC 34-1 is now referred to as IEC 60034-1.Consolidated editionsThe IEC is now publishing consolidated versions of its publications.For example,edition numbers 1.0,1.1 and 1.2 refer,respectively,to the base publication,thebase publication incorporating amendment 1 and the base publication incorporatingamendments 1 and 2.Further information on IEC publicationsThe technical content of IEC publications is kept under constant review by the IEC,thus ensuring that the content reflects current technology.Information relating tothis publication,including its validity,is available in the IEC Catalogue ofpublications(see below)in addition to new editions,amendments and corrigenda.Information on the subjects under consideration and work in progress undertakenby the technical committee which has prepared this publication,as well as the listof publications issued,is also available from the following:IEC Web Site(www.iec.ch)Catalogue of IEC publicationsThe on-line catalogue on the IEC web site(www.iec.ch/catlg-e.htm)enablesyou to search by a variety of criteria including text searches,technicalcommittees and date of publication.On-line information is also available onrecently issued publications,withdrawn and replaced publications,as well ascorrigenda.IEC Just PublishedThis summary of recently issued publications(www.iec.ch/JP.htm)is alsoavailable by email.Please contact the Customer Service Centre(see below)forfurther information.Customer Service CentreIf you have any questions regarding this publication or need further assistance,please contact the Customer Service Centre:Email:custserviec.chTel:+41 22 919 02 11Fax:+41 22 919 03 00LICENSED TO MECON Limited.-RANCHI/BANGALOREFOR INTERNAL USE AT THIS LOCATION ONLY,SUPPLIED BY BOOK SUPPLY BUREAU.INTERNATIONALSTANDARDIEC61523-2First edition2002-05Delay and power calculation standards Part 2:pre-layout delay calculation specificationfor CMOS ASIC libraries IEC 2002 Copyright-all rights reservedNo part of this publication may be reproduced or utilized in any form or by any means,electronic ormechanical,including photocopying and microfilm,without permission in writing from the publisher.International Electrotechnical Commission,3,rue de Varemb,PO Box 131,CH-1211 Geneva 20,SwitzerlandTelephone:+41 22 919 02 11 Telefax:+41 22 919 03 00 E-mail:inmailiec.ch Web:www.iec.chWFor price,see current cataloguePRICE CODECommission Electrotechnique InternationaleInternational Electrotechnical Commission LICENSED TO MECON Limited.-RANCHI/BANGALOREFOR INTERNAL USE AT THIS LOCATION ONLY,SUPPLIED BY BOOK SUPPLY BUREAU.2 61523-2 IEC:2002(E)CONTENTSForeword.31Scope and object.52Normative references.53Relations with other companion standards activities.64 Terms and definitions.65Pre-layout delay calculation method for CMOS ASIC libraries.7Annex A(informative)Four points interpolation.15Annex B(informative)Three ponts interpolation.17Annex C(informative)Selection method of interpolation plane.20Annex D(informative)Theoretical accuracy comparison between two interpolationmethods.25Annex E(informative)Application example.31Annex F(informative)Example of Cn,Ts,Tpd tables by delay calculation language.35LICENSED TO MECON Limited.-RANCHI/BANGALOREFOR INTERNAL USE AT THIS LOCATION ONLY,SUPPLIED BY BOOK SUPPLY BUREAU.$%&#(2!,./:20020.1!,34.G3O4,23OT.T./4G24./U3,/OT/2NN,-,23VVVVVVVVV#$%&!%!()*#+!,%$,-$%./)!0.%+0!1(234!56!(37892:;29?C?24?;C;3!,D)0!%0/,!9?E323?7A*2G.W2G+%14I7,./0,A76=AC5=H.H7;A65A7;IC;=H/5BBCFFC51CF=856H98C9756S=CX=AC5E56FA=9=69CX=AC5;5BS=HH=AC5=H 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