ASTM_F_1212_-_89_2002.pdf

Designation:F 1212 89(Reapproved 2002)Standard Test Method forThermal Stability Testing of Gallium Arsenide Wafers1This standard is issued under the fixed designation F 1212;the number immediately following the designation indicates the year oforiginal adoption or,in the case of revision,the year of last revision.A number in parentheses indicates the year of last reapproval.Asuperscript epsilon(e)indicates an editorial change since the last revision or reapproval.1.Scope1.1 This destructive test method determines whether a givensample of semi-insulating gallium arsenide(GaAs)will remainsemi-insulating after exposure to the high temperatures nor-mally required for the activation of implanted layers.1.2 The underlying assumption is that other wafers of GaAs,whose manufacturing history was the same as the wafer fromwhich the test sample was taken,will respond to high tempera-tures in like manner.1.3 The emphasis in this test method is on simplicity andsafety of apparatus,and on securing a measurement that isindependent of the apparatus used.1.4 This test method is directly applicable to uncapped andunimplanted samples of GaAs.However,users of this testmethod may extend it to capped or implanted samples,or both,in which case a controlled test of capped versus uncappedsamples,or implanted versus unimplanted samples,is recom-mended.1.5 This test method detects impurities“from the bulk(that is,from within the GaAs wafer)that will likely affect theelectrical behavior of devices formed on the surface of thewafer.This test method is not sensitive to surface impurities orprocess-induced impurities,except as interferences(see Inter-ferences).1.6 This standard does not purport to address all of thesafety concerns,if any,associated with its use.It is theresponsibility of the user of this standard to establish appro-priate safety and health practices and determine the applica-bility of regulatory limitations prior to use.2.Referenced Documents2.1 ASTM Standards:2F 76 Test Methods for Measuring Resistivity and HallCoefficient and Determining Hall Mobility in Single-Crystal Semiconductors3.Terminology3.1 Definitions:3.1.1 annealingThe process of heating a sample of GaAsin a furnace to a specific temperature,under a reducingatmosphere and with a means to reduce the loss of arsenic viasublimation from its surface.3.1.2 capped annealingThe process of placing a protec-tive layer(usually silicon nitride or silicon dioxide)on theGaAs sample surface,thereby reducing the loss of arsenicvapor from the samples surface during annealing.It is notdescribed further in this test method,since the capping processintroduces several variables that can affect the test results.3.1.3 proximity annealingThe process of placing theGaAs sample between two similar pieces of GaAs,therebyreducing the loss of arsenic vapor from the samples surfaceduring annealing.3.1.4 thermal stabilityThe ratio between the samplesapparent bulk resistivity after the annealing test,and anidentical samples bulk resistivity without annealing.4.Summary of Test Method4.1 The sample is heated in a manner similar to the heatingprocess that an ion-implanted wafer would undergo.Then thebulk resistivity of the sample is compared to the bulk resistivityof an identical sample(control)that did not undergo heattreatment.The difference between the resistivities,if any,is ameasure of the samples sensitivity to heat treatment,or inother words its“thermal stability.5.Significance and Use5.1 Devices that involve ion implantation into a monocrys-talline semi-insulating GaAs wafer are designed with theassumption that the wafer will remain semi-insulating duringmanufacture.However,ion implantation always damages thecrystal lattice of the wafers surface,and the damaged surfacelayer tends to collect impurities from the bulk of the waferwhen the wafer is heated.Those impurities can becomeunwanted dopants:they can render the surface layer conduc-tive,or interfere with the implanted species in various ways.The net effect in either case is a nonfunctioning device.5.2 No spectroscopic method is sensitive enough to detectall possible bulk impurities;their presence in the wafer itselfcannot be predicted in advance.This test method serves to1This test method is under the jurisdiction of ASTM Committee F01 onElectronics and is the direct responsibility of Subcommittee F01.15 on CompoundSemiconductors.Current edition approved Feb.24,1989.Published April 1989.2For referenced ASTM standards,visit the ASTM website,www.astm.org,orcontact ASTM Customer Service at serviceastm.org.For Annual Book of ASTMStandards volume information,refer to the standards Document Summary page onthe ASTM website.1Copyright ASTM International,100 Barr Harbor Drive,PO Box C700,West Conshohocken,PA 19428-2959,United States.concentrate them in the surface layer of a sample taken fromone of the wafers,so that a semiquantitative estimate of theirelectrical behavior may be made.5.3 It is important to understand the main assumption tha